Alif Semiconductor /AE512F80F55D5AS_CM55_HP_View /DMA1_SEC /DMA_DSR

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Interpret as DMA_DSR

DNS=Val_0x0, WAKEUP_EVENT=Val_0x0, DMA_STATUS=Val_0x0

Description

DMA Manager Status Register

Fields

DMA_STATUS	This bit field presents the operating state of the DMA manager. For more information, see Section Thread Operating States. 0 (Val_0x0): Stopped. 1 (Val_0x1): Executing. 2 (Val_0x2): Cache miss. 3 (Val_0x3): Updating PC. 4 (Val_0x4): Waiting for event. 15 (Val_0xF): Faulting.
WAKEUP_EVENT	When the DMA manager thread executes a DMAWFE instruction, it waits for the following event to occur: 0 (Val_0x0): event[0]. 1 (Val_0x1): event[1]. 2 (Val_0x2): event[2]. 31 (Val_0x1F): event[31].
DNS	This bit provides the security status of the DMA manager thread. 0 (Val_0x0): DMA manager operates in the secure state. 1 (Val_0x1): DMA manager operates in the non-secure state.

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